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| MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTW8N60E/D Designer'sTM Data Sheet TMOS E-FET.TM Power Field Effect Transistor TO-247 with Isolated Mounting Hole N-Channel Enhancement-Mode Silicon Gate This high voltage MOSFET uses an advanced termination scheme to provide enhanced voltage-blocking capability without degrading performance over time. In addition, this advanced TMOS E-FET is designed to withstand high energy in the avalanche and commutation modes. The new energy efficient design also offers a drain-to-source diode with a fast recovery time. Designed for high voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. * Robust High Voltage Termination * Avalanche Energy Specified * Source-to-Drain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode * Diode is Characterized for Use in Bridge Circuits * IDSS and VDS(on) Specified at Elevated Temperature * Isolated Mounting Hole Reduces Mounting Hardware MAXIMUM RATINGS (TC = 25C unless otherwise noted) Rating Drain-Source Voltage Drain-Gate Voltage (RGS = 1.0 M) Gate-Source Voltage -- Continuous Gate-Source Voltage -- Non-Repetitive (tp 10 ms) Drain Current -- Continuous Drain Current -- Continuous @ 100C Drain Current -- Single Pulse (tp 10 s) Total Power Dissipation Derate above 25C Operating and Storage Temperature Range Single Pulse Drain-to-Source Avalanche Energy -- Starting TJ = 25C (VDD = 100 Vdc, VGS = 10 Vdc, IL = 24 Apk, L = 3.0 mH, RG = 25 ) Thermal Resistance -- Junction to Case Thermal Resistance -- Junction to Ambient Maximum Lead Temperature for Soldering Purposes, 1/8 from case for 10 seconds Symbol VDSS VDGR VGS VGSM ID ID IDM PD TJ, Tstg EAS RJC RJA TL MTW8N60E Motorola Preferred Device TMOS POWER FET 8.0 AMPERES 600 VOLTS RDS(on) = 0.55 OHM (R) D G S CASE 340K-01, Style 1 TO-247AE Value 600 600 20 40 8.0 6.4 24 180 1.43 - 55 to 150 864 0.70 40 260 Unit Vdc Vdc Vdc Vpk Adc Apk Watts W/C C mJ C/W C Designer's Data for "Worst Case" Conditions -- The Designer's Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves -- representing boundaries on device characteristics -- are given to facilitate "worst case" design. E-FET and Designer's are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. Preferred devices are Motorola recommended choices for future use and best overall value. REV 4 (c)Motorola TMOS Power MOSFET Transistor Device Data Motorola, Inc. 1996 1 MTW8N60E ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted) Characteristic OFF CHARACTERISTICS Drain-Source Breakdown Voltage (VGS = 0 Vdc, ID = 250 Adc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = 600 Vdc, VGS = 0 Vdc) (VDS = 600 Vdc, VGS = 0 Vdc, TJ = 125C) Gate-Body Leakage Current (VGS = 20 Vdc, VDS = 0) ON CHARACTERISTICS (1) Gate Threshold Voltage (VDS = VGS, ID = 250 Adc) Temperature Coefficient (Negative) Static Drain-Source On-Resistance (VGS = 10 Vdc, ID = 4.0 Adc) Drain-Source On-Voltage (VGS = 10 Vdc) (ID = 8.0 Adc) (ID = 4.0 Adc, TJ = 125C) Forward Transconductance (VDS = 15 Vdc, ID = 4.0 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance SWITCHING CHARACTERISTICS (2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Gate Charge (See Figure 8) (VDS = 300 Vdc, ID = 8 0 Ad Vd 8.0 Adc, VGS = 10 Vdc) 8.0 Adc, (VDD = 300 Vdc, ID = 8 0 Ad Vd VGS = 10 Vdc Vdc, RG = 9.1 ) ) td(on) tr td(off) tf QT Q1 Q2 Q3 SOURCE-DRAIN DIODE CHARACTERISTICS Forward On-Voltage (1) (IS = 8.0 Adc, VGS = 0 Vdc) (IS = 8.0 Adc, VGS = 0 Vdc, TJ = 125C) VSD -- -- trr ( (IS = 8 0 Ad , VGS = 0 Vdc, 8.0 Adc, Vd , dIS/dt = 100 A/s) Reverse Recovery Stored Charge INTERNAL PACKAGE INDUCTANCE Internal Drain Inductance (Measured from the drain lead 0.25 from package to center of die) Internal Source Inductance (Measured from the source lead 0.25 from package to source bond pad) (1) Pulse Test: Pulse Width 300 s, Duty Cycle 2%. (2) Switching characteristics are independent of operating junction temperature. LD LS -- -- 4.5 13 -- -- nH nH ta tb QRR -- -- -- -- 0.829 0.71 381 225 156 4.61 1.1 -- -- -- -- -- C ns Vdc -- -- -- -- -- -- -- -- 23.6 37.6 80 48 67 17 26 27 50 70 170 95 100 -- -- -- nC ns (VDS = 25 Vdc, VGS = 0 Vdc, Vdc Vdc f = 1.0 MHz) Ciss Coss Crss -- -- -- 2480 247 56 3470 346 120 pF VGS(th) 2.0 -- RDS(on) VDS(on) -- -- gFS 4.0 3.2 -- 8.5 4.8 4.6 -- mhos -- 3.0 7.0 0.46 4.0 -- 0.55 Vdc mV/C Ohm Vdc V(BR)DSS 600 -- IDSS -- -- IGSS -- -- -- -- 10 100 100 nAdc -- 695 -- -- Vdc mV/C Adc Symbol Min Typ Max Unit Reverse Recovery Time (See Figure 14) 2 Motorola TMOS Power MOSFET Transistor Device Data |
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